The invention relates to techniques for receiving signals from light sensing pixels or other sensing elements through a line. Particularly, the invention relates to methods, circuits, and systems that vary a capacitance that receives such signals. For example, capacitance may be varied in accordance with a readout characteristic of pixels, such as color sensed, conversion efficiency or readout signal range. Capacitance can be varied to perform color equalization at the input of a readout path.
Various types of sensing elements and configurations are known. For example, U.S. Pat. No. 6,204,524, incorporated herein by reference, describes CMOS active pixel sensor (APS) arrays and compares them to other semiconductor-based imagers, including charge coupled devices (CCDs), photodiode arrays, charge injection devices, and hybrid focal plane arrays.
In many known configurations, a number of sensing elements, often called “pixels”, provide their signals through a line, sometimes referred to herein as a “readout line”. In a row/column array, for example, each column typically has a readout line to receive signals from a group of pixels that includes one pixel from each row; when a row is selected, each pixel in the row can provide its signal through its column's readout line.
In some applications, sensing elements of different types provide signals on a shared readout line. For example, in a CMOS APS array for color image sensing, different sets of pixels receive and sense different colors due to filters over the pixels. Each pixel's filter passes light of only one color or wavelength range; with RGB filtering, some pixels receive red, others green, and others blue. In a typical array, pixels that receive different colors are arranged so that each readout line receives signals from pixels in more than one set.
As is well known, a pixel's quantum efficiency (QE) depends on the color sensed: For example, a blue pixel may have 40-60% lower QE than a green pixel, meaning that the blue pixel converts photons to charge less efficiently and therefore provides signals in a lower range than the green pixel. In a CMOS array on a silicon substrate, this phenomenon results from an inherent property of silicon, which, within the visible spectrum, converts green wavelength light at a higher efficiency and is least efficient at converting blue wavelength light. As a result, pixels that sense different colors provide signals with different characteristics.
Known techniques improve image quality by equalizing gain of signals from pixels that sense different colors. Color equalization of this type is typically performed before color interpolation or other digital image processing. A commonly used color gain ratio is: GainBlue=1.4*GainGreen and GainRed=1.2*GainGreen.
FIG. 1 shows circuit 100, which exemplifies a conventional architecture for color equalization in a CMOS APS array. Circuit 100 can be implemented as integrated circuitry on a chip. Pixel array 110 is a row/column array with M rows and N columns of pixels. As illustrated, pixels 112 and 114 are both in one of the columns, and both provide signals through line 116, the readout line for the column.
Sample-and-hold (S/H) array 120 receives signals from array 110 on N lines, one for each column. In response to digital control signals, each column's signals are stored temporarily in an S/H cell for the column, as illustrated by S/H cell 122, and are provided to N:1 multiplexer 124 through N lines. Multiplexer 124 also receives Address [0-9], a 10 bit address identifying one of the N columns, and responds by providing the output of the identified column's S/H cell as output. In the illustrated implementation, S/H cell 122 stores two values, a signal value and a reset value, both of which are provided at the output of multiplexer 124.
Variable gain amplifier 130 receives a column's signal and reset values and performs color gain equalization by providing an appropriate gain for each pixel based on the color the pixel senses. The gain can, for example, multiply a column's signal and reset values by a factor between 1 and 16, and can be applied in a series of steps.
Analog-to-digital converter (ADC) S/H amplifier 132 temporarily stores color equalized signal and reset values from amplifier 130, allowing ADC 134 to convert the signal and reset values into digital values, illustratively on N parallel lines. ADC 134 can be implemented as a pipeline ADC block.
The invention addresses problems with these and other readout techniques.